Intel Process Roadmap Through 2025: Renamed Process Nodes, Angstrom Era Begins


Intel CEO Pat Gelsinger whipped the covers off the company’s new process and packaging roadmap that now stretches out to 2025, outlining an annual cadence of the company’s future process nodes spanning from standard nanometer-scale tech down to incredibly small angstrom-class transistors. Intel also teased the first details of its angstrom-class (the next measurement below nanometer) technology, like RibbonFET, its first new transistor design since FinFET arrived a decade ago, and PowerVia, a new backside power delivery technique that sandwiches the transistors between layers of wiring. Intel will also change its process node naming scheme again, this time to match the naming used by external foundries like TSMC. That re-branding begins with Intel’s 10nm Enhanced SuperFin, which will now be renamed to ‘Intel 7.’

Intel says its process tech will match the current industry leader, TSMC, by 2024, and that it will retake ‘process performance leadership’ by 2025, helped along by being the first company to receive a next-gen High NA EUV machine from ASML for its next-gen chips. Intel also shared details of its future Foveros Omni and Direct technologies during its ‘Intel Accelerated’ webcast (which you can watch here) and announced that its Sapphire Rapids chips would be the ‘first dual-reticle-sized device’ in the industry.

Intel’s fledging foundry services business also notched two big wins, with AWS announcing that it will use Intel’s packaging services while Qualcomm announced that it will use Intel’s 20A process for future chip designs. Let’s dive in. 

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Intel Renames 10nm to 7nm

Before we get to the roadmaps, in a necessary move that will likely draw criticism, Intel is renaming its process nodes to align with the current naming conventions used by the third-party foundries like TSMC and Samsung.



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