During its IDM 2.0 keynote, Intel’s CEO, Pat Gelsinger, unveiled his company’s brand new process roadmap along with a refreshing new naming scheme for next-generation nodes. The brand new roadmap covers all nodes and the respective products that we can expect to enter manufacturing and production through 2025 and beyond.
Intel Process Roadmap & Innovation Roadmap Highlights Brand New Node Naming Scheme, Drops ‘++’ & ‘SuperFin’ Brandings
Intel is restructuring as a whole under its new leadership and it looks like the process nodes, that have been confusing over the past few years, will finally be understandable for the general public. Intel recently has its 10nm SuperFin process node which is an enhanced variant of the Intel 10nm (++) node utilized by Ice Lake chips. Currently, Intel has both 10nm and 14nm chips within mobile and desktop platforms but that’s going to change later this year when Intel finally brings forth its Alder Lake and Sapphire Rapids lineup.
Under IDM 2.0, our factory network continues to deliver and we are now manufacturing more 10-nanometer wafers than 14-nanometer. As 10-nanometer volumes ramp, economics are improving with 10-nanometer wafer cost 45% lower year-over-year with more to come.
Intel 7 Process Node (Previously 10nm Enhanced SuperFin)
So first up, we have Intel 7, a new name for the company’s 10nm Enhanced SuperFin process node. This node was going to power Intel’s Alder Lake Client and Sapphire Rapids Server lineup. Based on what Intel has stated, the node will offer a 10-15% performance per watt gain over 10nm SuperFin and feature FinFET transistor optimizations. Intel 7 is ready for volume production and the first products are expected to land on market by Q4 2021
Intel 7 delivers an approximately 10% to 15% performance-per-watt increase versus Intel 10nm SuperFin, based on FinFET transistor optimizations. Intel 7 will be featured in products such as Alder Lake for client in 2021 and Sapphire Rapids for the data center, which is expected to be in production in the first quarter of 2022.
Intel 4 Process Node (Previously 7nm)
Intel 4 is also something that the company has previously referred to as its 7nm process node. This is a much hyped-up node as it powers several next-generation products including Ponte Vecchio & along with that, we have Meteor Lake for Client and Granite Rapids for datacenters. Intel is claiming a 20% performance per watt gain for Intel 4 over Intel 7. In addition to these, Intel 4 will deliver a good list of enhancements over 10nm which will include:
- 2x density scaling vs Intel 7
- Planned intra-node optimizations
- 4x reduction in design rules
- Next-Gen Foveros & EMIB Packaging
The node will also make full use of EUV Lithography and already has products taping out such as the Meteor Lake Compute Tile which was taped out during the previous quarter. Granite Rapids will also feature a multi-compute tile design and its main Granite Rapids core will be fabricated on the Intel 4 node.
Intel 4 fully embraces EUV lithography to print incredibly small features using ultra-short wavelength light. With an approximately 20% performance-per-watt increase, along with area improvements, Intel 4 will be ready for production in the second half of 2022 for products shipping in 2023, including Meteor Lake for client and Granite Rapids for the data center.
Intel 3 Process Node (An Intel 4 Optimization?)
Moving beyond Intel 4, the company plans to launch its Intel 3 process node which would be ready for manufacturing products by the second half of 2023. Based on everything that Intel has listed, it looks like Intel 3 is a generational optimization of Intel 4 as it delivers an 18% performance per watt gain, offers denser HP libraries, increases the intrinsic driver current, increased EUV use & reduces via resistance.
It looks like everything beyond Meteor Lake (Lunar Lake) and Granite Ridge (Diamond Rapids) could utilize the Intel 3 process node though we are talking about products that would launch in 2024 or even 2025 by the earliest so there’s a long way to go.
Intel 3 leverages further FinFET optimizations and increased EUV to deliver an approximately 18% performance-per-watt increase over Intel 4, along with additional area improvements. Intel 3 will be ready to begin manufacturing products in the second half of 2023.
Intel 20A Process Node & Beyond (A True Next-Gen Node)
Intel has gone ahead to talk about its post-nanometer era with a new product it is referring to as Intel 20A. The Intel 20A starts the Angstrom era (A for Angstrom) which is equal to 10⁻¹⁰ m or 1A = 0.1nm. This is just a cool way of saying 2nm but given how small nodes have gotten and the fact that we are heading down to decimal spaces within this decade, Intel decided a new measuring unit was needed.
So Intel 20A (2nm) is going to offer breakthrough innovations when it enters the early production phase by 1H 2024. The 20A node is expected to feature brand new RibbonFET transistors that will replace the existing FinFET architecture and also deliver new interconnect innovations, one of which is known as PowerVia. Intel is also expanding upon its Forveros technologies with Omni and Direct. Forveors Omni will be featured in products that package high-performance compute tiles while Forveors Direct will allow multi-tier interconnector resistance through a copper to copper bond. Forveros as a whole will be updated to deliver increased bandwidth through next-gen inter-connect solutions.
Intel 20A ushers in the angstrom era with two breakthrough technologies, RibbonFET and PowerVia. RibbonFET, Intel’s implementation of a gate-all-around transistor, will be the company’s first new transistor architecture since it pioneered FinFET in 2011. The technology delivers faster transistor switching speeds while achieving the same drive current as multiple fins in a smaller footprint. PowerVia is Intel’s unique industry-first implementation of backside power delivery, optimizing signal transmission by eliminating the need for power routing on the front side of the wafer. Intel 20A is expected to ramp in 2024.
- Foveros Omni ushers in the next generation of Foveros technology by providing unbounded flexibility with performance 3D stacking technology for die-to-die interconnect and modular designs. Foveros Omni allows die disaggregation, mixing multiple top die tiles with multiple base tiles across mixed fab nodes and is expected to be ready for volume manufacturing in 2023.
- Foveros Direct moves to direct copper-to-copper bonding for low-resistance interconnects and blurs the boundary between where the wafer ends and where the package begins. Foveros Direct enables sub-10 micron bump pitches providing an order of magnitude increase in the interconnect density for 3D stacking, opening new concepts for functional die partitioning that were previously unachievable. Foveros Direct is complementary to Foveros Omni and is also expected to be ready in 2023.
Intel Process Roadmap
|Process Name||Intel 10nm SuperFin||Intel 7||Intel 4||Intel 3||Intel 20A||Intel 18A|
|Production||In High-Volume (Now)||In Volume (Now)||2H 2022||2H 2023||2H 2024||2H 2025|
|Perf/Watt (over 10nm ESF)||N/A||10-15%||20%||18%||>20%?||TBA|
|Transistor Architecture||FinFET||Optimized FinFET||Optimized FinFET||Optimized FinFET||RibbonFET||Optimized RibbonFET|
|Products||Tiger Lake||Alder Lake|
Xe-HPC / Xe-HP?
As for products based on the Intel 20A process node, don’t expect them to be a reality prior to 2025. Also, based upon the older roadmaps and where 20A is positioned, it looks to be either a rename of Intel’s 5nm or 3nm process node. but more scaled up to add in the ‘+’ optimizations which have been excluded from now onwards.
Intel doesn’t stop at 20A though, they go on to discuss next-generation nodes through 2025 and beyond which would include 18A. The 18A node is already in development for early 2025 and will feature refinements to the RibbonFET architecture to deliver another major leap in transistor and chip performance.
These new innovations and naming schemes are great to avoid the mess that Intel was headed into just a few years back. The company had process node roadmaps lineup with several nodes & their respective backports + optimizations in a really confusing manner. Now, Intel can move forward without worrying about the naming schemes and offer a unified process node lineup under its new naming criteria.